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Commit 90bb5ab3 authored by Alessio Igor Bogani's avatar Alessio Igor Bogani
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Move a2720.h to a2720-mod

parent 56b48025
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Makefile
View file @ 90bb5ab3
......@@ -6,15 +6,14 @@ text.bin: ControlLoop.out
text1.bin: ReadADC.out
$(HEXPRU) bin1.cmd ReadADC.out
ControlLoop.out: a2720.h ControlLoop.c
ControlLoop.out: ControlLoop.c
$(CLPRU) $(CLPRUFLAGS) -s ControlLoop.c -z AM335x_PRU.cmd -o ControlLoop.out -m ControlLoop.map $(CLPRULDFLAGS)
ReadADC.out: a2720.h ReadADC.c
ReadADC.out: ReadADC.c
$(CLPRU) $(CLPRUFLAGS) -s ReadADC.c -z AM335x_PRU.cmd -o ReadADC.out -m ReadADC.map $(CLPRULDFLAGS)
install: text.bin text1.bin
install -d $(DESTDIR)/usr/lib/firmware $(DESTDIR)/usr/include
install -m 0644 *.h $(DESTDIR)/usr/include
install -d $(DESTDIR)/usr/lib/firmware
install -m 0644 $? $(DESTDIR)/usr/lib/firmware
clean:
......
a2720.h deleted 100644 → 0
View file @ 56b48025
#ifndef _A2720_H_
#define _A2720_H_
#ifdef __KERNEL__
#define PRU_ICSS_base 0x4A300000
/*#define PRU0_r31_7_mux 0x44e109AC */
#define PRUSS_MMAP_SIZE 0x40000
/*
* PRU INTC register config
*/
#define SIPR1 0xFFFFFFFF
#define SIPR2 0xFFFFFFFF
#define CMR1 0
#define CMR2 0
#define CMR3 0
#define CMR4 0
#define CMR5 0x2000100
#define CMR6 0x10003
#define CMR7 0
#define CMR8 0
#define CMR9 0
#define CMR10 0
#define CMR11 0
#define CMR12 0
#define CMR13 0
#define CMR14 0
#define CMR15 0
#define CMR16 0
#define HMR1 0x3020100
#define HMR2 0
#define HMR3 0
#define SITR1 0
#define SITR2 0
#define ESR1 0x7e0000
#define ESR2 0
#define SECR1 0
#define SECR2 0
#define HOSTENABLE0 1
#define HOSTENABLE1 1
#define HOSTENABLE2 1
#define HOSTENABLE3 1
#define HOSTENABLE4 0
#define HOSTENABLE5 0
#define HOSTENABLE6 0
#define HOSTENABLE7 0
#define HOSTENABLE8 0
#define HOSTENABLE9 0
#define GER 0x1
/*
* PRU register offsets
*/
#define DATARAM0 0x00000
#define DATARAM1 0x02000
#define PRUSS_SHAREDRAM 0x10000
#define INTC 0x20000
#define PRU0CONTROL 0x22000
#define PRU0DEBUG 0x22400
#define PRU1CONTROL 0x24000
#define PRU1DEBUG 0x24400
#define PRUSS_CFG 0x26000
#define PRUSS_UART 0x28000
#define PRUSS_IEP 0x2e000
#define PRUSS_ECAP 0x30000
#define PRUSS_MIIRT 0x32000
#define PRUSS_MDIO 0x32400
#define PRU0IRAM 0x34000
#define PRU1IRAM 0x38000
/*
* PRUSS INTC register offsets
*/
#define PRU_INTC_REVID_REG 0x000
#define PRU_INTC_CR_REG 0x004
#define PRU_INTC_HCR_REG 0x00C
#define PRU_INTC_GER_REG 0x010
#define PRU_INTC_GNLR_REG 0x01C
#define PRU_INTC_SISR_REG 0x020
#define PRU_INTC_SICR_REG 0x024
#define PRU_INTC_EISR_REG 0x028
#define PRU_INTC_EICR_REG 0x02C
#define PRU_INTC_HIEISR_REG 0x034
#define PRU_INTC_HIDISR_REG 0x038
#define PRU_INTC_GPIR_REG 0x080
#define PRU_INTC_SRSR1_REG 0x200
#define PRU_INTC_SRSR2_REG 0x204
#define PRU_INTC_SECR1_REG 0x280
#define PRU_INTC_SECR2_REG 0x284
#define PRU_INTC_ESR1_REG 0x300
#define PRU_INTC_ESR2_REG 0x304
#define PRU_INTC_ECR1_REG 0x380
#define PRU_INTC_ECR2_REG 0x384
#define PRU_INTC_CMR1_REG 0x400
#define PRU_INTC_CMR2_REG 0x404
#define PRU_INTC_CMR3_REG 0x408
#define PRU_INTC_CMR4_REG 0x40C
#define PRU_INTC_CMR5_REG 0x410
#define PRU_INTC_CMR6_REG 0x414
#define PRU_INTC_CMR7_REG 0x418
#define PRU_INTC_CMR8_REG 0x41C
#define PRU_INTC_CMR9_REG 0x420
#define PRU_INTC_CMR10_REG 0x424
#define PRU_INTC_CMR11_REG 0x428
#define PRU_INTC_CMR12_REG 0x42C
#define PRU_INTC_CMR13_REG 0x430
#define PRU_INTC_CMR14_REG 0x434
#define PRU_INTC_CMR15_REG 0x438
#define PRU_INTC_CMR16_REG 0x43C
#define PRU_INTC_HMR1_REG 0x800
#define PRU_INTC_HMR2_REG 0x804
#define PRU_INTC_HMR3_REG 0x808
#define PRU_INTC_SIPR1_REG 0xD00
#define PRU_INTC_SIPR2_REG 0xD04
#define PRU_INTC_SITR1_REG 0xD80
#define PRU_INTC_SITR2_REG 0xD84
#define PRU_INTC_HIER_REG 0x1500
#define MAX_HOSTS_SUPPORTED 10
/*
* PRUSS definitions
*/
#define NUM_PRU_HOSTIRQS 8
#define NUM_PRU_HOSTS 10
#define NUM_PRU_CHANNELS 10
#define NUM_PRU_SYS_EVTS 64
#define PRUSS0_PRU0_DATARAM 0
#define PRUSS0_PRU1_DATARAM 1
#define PRUSS0_PRU0_IRAM 2
#define PRUSS0_PRU1_IRAM 3
#define PRUSS_V1 1 /* AM18XX */
#define PRUSS_V2 2 /* AM33XX */
/*
* Available in AM33xx series - begin
*/
#define PRUSS0_SHARED_DATARAM 4
#define PRUSS0_CFG 5
#define PRUSS0_UART 6
#define PRUSS0_IEP 7
#define PRUSS0_ECAP 8
#define PRUSS0_MII_RT 9
#define PRUSS0_MDIO 10
/*
* Available in AM33xx series - end
*/
#define PRU_EVTOUT_0 0
#define PRU_EVTOUT_1 1
#define PRU_EVTOUT_2 2
#define PRU_EVTOUT_3 3
#define PRU_EVTOUT_4 4
#define PRU_EVTOUT_5 5
#define PRU_EVTOUT_6 6
#define PRU_EVTOUT_7 7
/* #define GPIO1_16 48 */
#define GPIO2_7 71
#define GPIO1_28 60
#define GPIO2_11 75
#define GPIO2_9 73
#define GPIO1_6 38
#define GPIO1_7 39
#define GPIO1_2 34
#define GPIO1_3 35
#define GPIO1_13 45
#define GPIO1_12 44
#define GPIO1_15 47
#define GPIO2_25 89
#define GPIO0_26 26
#define GPIO3_21 117
#define GPIO2_0 64
#define GPIO1_17 49
#define GPIO2_1 65
#define A2720_CONTROL (DATARAM0 + 0x00)
#define A2720_OUTCURR (DATARAM0 + 0x04)
#define A2720_OUTCURRSETP (DATARAM0 + 0x08)
#define A2720_IOSTATUS (DATARAM0 + 0x0c)
#define A2720_KPCOEFF (DATARAM0 + 0x10)
#define A2720_KICOEFF (DATARAM0 + 0x14)
#define A2720_KDCOEFF (DATARAM0 + 0x18)
#define A2720_OUTCURRMIN (DATARAM0 + 0x1c)
#define A2720_OUTCURRMAX (DATARAM0 + 0x20)
#define A2720_KFFCOEFF (DATARAM0 + 0x24)
#define A2720_RESET (DATARAM0 + 0x28)
#define A2720_PRU0_FW_VER (DATARAM0 + 0x2c)
#define A2720_PULSE_DURATION (DATARAM0 + 0x30)
#define A2720_OUTRRAMPSTEP (DATARAM0 + 0x34)
#define A2720_PRU0_DEBUG0 (DATARAM0 + 0x38)
#define A2720_PRU0_DEBUG1 (DATARAM0 + 0x3c)
#define A2720_PRU0_DEBUG2 (DATARAM0 + 0x40)
#define A2720_PRU0_DEBUG3 (DATARAM0 + 0x44)
#define A2720_A0SCALCOEFF (DATARAM1 + 0x00)
#define A2720_A1SCALCOEFF (DATARAM1 + 0x04)
#define A2720_A2SCALCOEFF (DATARAM1 + 0x08)
#define A2720_A3SCALCOEFF (DATARAM1 + 0x0c)
#define A2720_A4SCALCOEFF (DATARAM1 + 0x10)
#define A2720_A5SCALCOEFF (DATARAM1 + 0x14)
#define A2720_AUXILIARYVOLT (DATARAM1 + 0x18)
#define A2720_HEATERTEMP (DATARAM1 + 0x1c)
#define A2720_OUTVOLT (DATARAM1 + 0x20)
#define A2720_DCLINKVOLT (DATARAM1 + 0x24)
#define A2720_AUX33V (DATARAM1 + 0x28)
#define A2720_HEATSINKTEMP (DATARAM1 + 0x2c)
#define A2720_AUX5V (DATARAM1 + 0x30)
#define A2720_PRU1_FW_VER (DATARAM1 + 0x34)
#define A2720_PRU1_DEBUG0 (DATARAM1 + 0x38)
#define A2720_PRU1_DEBUG1 (DATARAM1 + 0x3c)
#define A2720_PRU1_DEBUG2 (DATARAM1 + 0x40)
#define A2720_PRU1_DEBUG3 (DATARAM1 + 0x44)
struct a2720_config {
unsigned int control;
unsigned int reset;
unsigned int output_current_setpoint;
unsigned int kp_coefficient;
unsigned int ki_coefficient;
unsigned int kff_coefficient;
unsigned int kd_coefficient;
unsigned int output_ramp_step;
unsigned int output_current_min;
unsigned int output_current_max;
unsigned int a0_coefficient_scaling;
unsigned int a1_coefficient_scaling;
unsigned int a2_coefficient_scaling;
unsigned int a3_coefficient_scaling;
unsigned int a4_coefficient_scaling;
unsigned int a5_coefficient_scaling;
unsigned int pulse_duration;
unsigned int aux_a0;
unsigned int aux_a1;
unsigned int output_voltage_a0;
unsigned int output_voltage_a1;
unsigned int dc_a0;
unsigned int dc_a1;
unsigned int heater_a0;
unsigned int heater_a1;
unsigned int heatsink_a0;
unsigned int heatsink_a1;
} __attribute__((packed));
struct a2720_status {
unsigned int output_current;
unsigned int iostatus;
unsigned int auxiliary_voltage;
unsigned int heater_temperature;
unsigned int output_voltage;
unsigned int dclink_voltage;
unsigned int heatsink_temperature;
unsigned int aux33v;
unsigned int aux5v;
unsigned int pru0_fw_ver;
unsigned int pru0_debug0;
unsigned int pru0_debug1;
unsigned int pru0_debug2;
unsigned int pru0_debug3;
unsigned int pru1_fw_ver;
unsigned int pru1_debug0;
unsigned int pru1_debug1;
unsigned int pru1_debug2;
unsigned int pru1_debug3;
} __attribute__((packed));
#else /* __KERNEL__ */
#define TRUNCF(x) (truncf((x) * 1000000.0f) / 1000000.0f)
struct a2720_config {
unsigned int control;
unsigned int reset;
float output_current_setpoint;
float kp_coefficient;
float ki_coefficient;
float kff_coefficient;
float kd_coefficient;
float output_ramp_step;
float output_current_min;
float output_current_max;
float a0_coefficient_scaling;
float a1_coefficient_scaling;
float a2_coefficient_scaling;
float a3_coefficient_scaling;
float a4_coefficient_scaling;
float a5_coefficient_scaling;
unsigned int pulse_duration;
float aux_a0;
float aux_a1;
float output_voltage_a0;
float output_voltage_a1;
float dc_a0;
float dc_a1;
float heater_a0;
float heater_a1;
float heatsink_a0;
float heatsink_a1;
} __attribute__((packed));
struct a2720_status {
float output_current;
unsigned int iostatus;
unsigned int auxiliary_voltage;
unsigned int heater_temperature;
unsigned int output_voltage;
unsigned int dclink_voltage;
unsigned int heatsink_temperature;
unsigned int aux33v;
unsigned int aux5v;
unsigned int pru0_fw_ver;
unsigned int pru0_debug0;
unsigned int pru0_debug1;
unsigned int pru0_debug2;
unsigned int pru0_debug3;
unsigned int pru1_fw_ver;
unsigned int pru1_debug0;
unsigned int pru1_debug1;
unsigned int pru1_debug2;
unsigned int pru1_debug3;
} __attribute__((packed));
#endif /* __KERNEL__ */
#define PRUSS_MAX_IRAM_SIZE 8192
#define PRUSS_MAX_DRAM_SIZE 8192
#define A2720_IOC_MAGIC 88
#define A2720_ENABLE_PRU0 _IO(A2720_IOC_MAGIC, 0)
#define A2720_ENABLE_PRU1 _IO(A2720_IOC_MAGIC, 1)
#define A2720_DISABLE_PRU0 _IO(A2720_IOC_MAGIC, 2)
#define A2720_DISABLE_PRU1 _IO(A2720_IOC_MAGIC, 3)
#define A2720_LOAD_PRU0_PROGRAM _IOW(A2720_IOC_MAGIC, 4, unsigned int)
#define A2720_LOAD_PRU1_PROGRAM _IOW(A2720_IOC_MAGIC, 5, unsigned int)
#define A2720_GET_CONFIG _IOW(A2720_IOC_MAGIC, 6, struct a2720_config)
#define A2720_SET_CONFIG _IOW(A2720_IOC_MAGIC, 7, struct a2720_config)
#define A2720_GET_STATUS _IOW(A2720_IOC_MAGIC, 8, struct a2720_status)
/*
#define A2720_RESET_PRU _IO(A2720_IOC_MAGIC, 2)
#define A2720_PRUINTC_INIT _IO(A2720_IOC_MAGIC, 3)
#define A2720_IOC_MAXNR 5
*/
#endif /* _A2720_H_ */
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